5 research outputs found

    Exploiting the Parallelism Exposed by Partial Evaluation

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    We describe an approach to parallel compilation that seeks to harness the vast amount of fine-grain parallelism that is exposed through partial evaluation of numerically-intensive scientific programs. We have constructed a compiler for the Supercomputer Toolkit parallel processor that uses partial evaluation to break down data abstractions and program structure, producing huge basic blocks that contain large amounts of fine-grain parallelism. We show that this fine-grain prarllelism can be effectively utilized even on coarse-grain parallel architectures by selectively grouping operations together so as to adjust the parallelism grain-size to match the inter-processor communication capabilities of the target architecture

    Practical partial evaluation

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    Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1995.Includes bibliographical references (leaves 41-42).by Rajeev Surati.M.S

    A Parallelizing Compiler Based on Partial Evaluation

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    This thesis demonstrates a compiler that uses partial evaluation to achieve outstandingly efficient parallel object code from very high-level source programs. The source programs are ordinary Scheme numerical programs, written abstractly, with no attempt to structure them for parallel execution. The compiler identifies and extracts parallelism completely automatically; nevertheless, it achieves speedups equivalent to or better than the best observed results achieved by previous supercomputer compilers that require manual restructuring of code. This thesis represents one of the first attempts to capitalize on partial evaluation's ability to expose low-level parallelism. To demonstrate the effectiveness of this approach, we targeted the compiler for the Supercomputer Toolkit, a parallel machine with eight VLIW processors. Experimental results on integration of the gravitational n-body problem show that the compiler, generating code for 8 processors, achieves a factor of 6.2 speedup over..

    Scalable self-calibrating display technology for seamless large-scale displays

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    Thesis (Ph.D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, February 1999."January 1999."Includes bibliographical references (leaves 66-67).We present techniques for combining high-performance computing with feedback to enable the correction of imperfections in the alignment, optical system, and fabrication of very high-resolution display devices. The key idea relies on the measurement of relative alignment, rotation, optical distortion, and intensity gradients of an aggregated set of low-cost image display devices using a precision low cost reference. Use of the reference allows the construction of a locally correct map relating the coordinate system of the aggregate display to the coordinate systems of the individual projectors composing the display. This idea provides a new technology for linearly scalable, bright, seamless, high-resolution large-scale self-calibrating displays (seamless video walls). Such a large-scale display was constructed using the techniques described in this dissertation. Low-cost computation coupled with feedback is used to provide the precision necessary to create these displays. Digital photogrammetry and digital image warping techniques are used to make a single seamless image appear across the aggregated projection displays. The following techniques are used to improve the display quality: ** Anti-alias filtering to improve the display of high frequency in images; ** Limiting the range of displayed intensities to ones that can be displayed uniformly across all the projectors; and ** Applying intensity smoothing functions to the regions of the image that are projected in the overlapping region. These functions smoothly and gradually transition the projection among the projectors. The resultant systems demonstrate the viability of the approach by succeeding where other approaches have failed; it makes huge seamless video walls a reality.by Rajeev J. Surati.Ph.D
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